MRAM Forum Speaker Biographies
Simone Bertolazzi, PhD is a Technology & Market Analyst at Yole Développement (Yole), working with the Semiconductor, Memory and Computing division. He is a member of Yole’s Memory team and contributes daily to the analysis of memory markets and technologies, their related materials, and fabrication processes. Previously, Simone conducted experimental research in the fields of nanoscience and nanotechnology, focusing on emerging semiconducting materials and their device applications. He has authored or co-authored more than 15 papers in high-impact scientific journals and was awarded the Marie Curie Intra-European Fellowship. Simone obtained a PhD in Physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland), where he developed flash memory cells based on heterostructures of 2D materials and high-κ dielectrics.
Ko-Min Chang is a Senior Director at NXP. He joined Motorola 35 years ago after receiving the Ph.D from The Ohio State University. He initiated the development of many generations of proprietary embedded flash processes which served as the foundation of a long history of popular Motorola/Freescale MCU product families. Many of the flash cells and array concepts developed by the team were published and were subsequently adopted by other industry players for embedded applications serving automotive, industrial, and consumer segments. His focus in recent years has shifted to discovering and evaluating technologies that hold promising features to satisfy the explosive demand on user experiences. Ko-Min holds 35 US patents and served on IEDM and VLSI technical committees.
Eric Edwards is a member of the Advanced Logic & Memory Technology Research, Semiconductor, and AI Hardware Group of IBM Research at the Thomas J. Watson Research Center. He received his PhD from the University of Muenster in 2012 with a thesis on the optical study of magnetization dynamics in thin films, followed by postdoctoral work at the University of Regensburg and Martin Luther University Halle-Wittenberg. From 2015 to 2018, he was a National Research Council postdoctoral researcher at the National Institute of Standards and Technology in Boulder, Colorado working on high performance magnetic materials. He joined IBM Research in 2018, where he works on the development of MRAM technology for hybrid-cloud applications.
Shinobu Fujita received PhD from University of Tokyo and joined Toshiba in 1989. He has been working for new nonvolatile memory (NVM) circuit, system and application development for over 15 years. His major applications are ReRAM-based NV-logics, ReRAM-based-FPGA, NVM-based secure random number generators, NV-SRAM based cache memories, “normally-off processors” with STT-MRAM, persistent memory systems with STT-MRAM. These are used from cloud computing to IoT edge computing and mobile devices. Currently, he is a Senior Fellow of KIOXIA corporation ( formally Toshiba Memory Corporation ) and working on various NVM application projects including next generation flash memories.
Shunsuke Fukami, Ph.D. is a Professor of the Research Institute of Electrical Communication in Tohoku University. His areas of expertise include spintronics physics/materials/devices and their application to integrated circuits and computing technologies. He received his Master degree in Nagoya University in 2005, and joined NEC Corporation. He received his Doctor degree from Nagoya University in 2012. In 2011, he moved to Tohoku University. He received a number of awards for his researches, including the JSAP Young Scientist Presentation Award, the Young Scientists' Prize of Science and Technology by the MEXT, Asian Union of Magnetics Societies, Young Researchers Award, the Outstanding Research Award of the Magnetics Society of Japan, and the JSAP Outstanding Paper Award.
Dr. Jack Guedj has been President and CEO of Tensilica since 2008 where, he transformed Tensilica into a rapidly growing company ascending to the #1 position in merchant DSP and ultimately leading to the Cadence acquisition in 2013 where he served as Corporate VP, Tensilica Products. Prior to Tensilica Jack led the spin-out of Magnum from Cirrus Logic serving as founder, president and CEO. Jack led Magnum’s growth from ground zero to leadership in Multimedia SOCs for the Professional Video Broadcast, Consumer PVR TV/Camcorder/DVD Recorder and Set Top Box markets and the acquisition of the Consumer Products Group of LSI Corporation (C Cube). Prior to Cirrus, Jack was President of Tvia, Inc., leading that company’s successful IPO in August 2000. Jack holds an MBA from the UCLA Graduate School of Management. Jack attained a MSEE from Pierre & Marie Curie Engineering School of Paris, and a doctoral degree from the University of Pierre & Marie Curie.
Seung Kang is a recognized semiconductor technologist who has holistically driven system-centric innovations of device, circuit design, and chip architecture. He built and led an advanced memory team at Qualcomm who pioneered embedded STT-MRAM and delivered the industry-first product prototype for mobile SOC. He currently leads a team for developing sub-5nm CMOS logic architecture, circuit, and co-optimization methodology. He received Ph.D. from U.C. Berkeley and both B.S. and M.S. from Seoul National University, Korea. Dr. Kang has published >100 papers and given >70 keynote and invited speeches. He served as Distinguished Lecturer for the IEEE Electron Device Society from 2014 to 2018 and as Visiting Professor at the Center for Innovative Integrated Electronic Systems of Tohoku University. He holds >240 granted US patents.
Gouri Sankar Kar received the PhD degree in semiconductor device physics from the Indian Institute of Technology, Khragput, India in 2002. From 2002 to 2005, he was a visiting scientist at Max Planck Institute for Solid State Research, Stuttgart, Germany, where he worked with Nobel Laureate (1985, Quantum Hall Effect) Prof. Klaus von Klitzing on quantum dot FET. In 2006, he joined Infineon/Qimonda in Dresden, Germany as lead integration engineer. There he worked on the vertical transistor for DRAM application. In 2009, he joined imec, Leuven, Belgium, where he is currently program director. In this role, he defines the research strategy and vision for SCM, DRAM, FeRAM and MRAM programs both for stand-alone and embedded applications. He has authored, co-authored more than 200 peer-reviewed publications, many articles and holds patents in the memory domain.
Manu Perumkunnil Komalan completed his Integrated Masters in Nanotechnology from Amity University, India in 2011. He received his Ph.D. in Electrical Engineering from Katholieke Univ. Leuven, Belgium and in Computer Science from Universidad Complutense de Madrid in 2017. He then joined imec as a memory system architecture researcher. His research activity primarily involves exploration, analysis, and optimization of NVMs across the different layers of abstraction. He is also interested in system level design, bridging the gap between hardware and software. Currently, he is the Manager of the Memory INSITE program at imec.
Johannes Müller is a member of the eNVM development team at GLOBALFOUNDRIES Dresden and currently acts as the responsible MTJ-Module Integrator for the 22FDX™ STT-MRAM technology. Prior to joining GLOBALFOUNDRIES he was heading the group for Non-Volatile Memories at Fraunhofer IPMS (formerly known as CNT) overseeing direct industry collaborations and European projects focused on FERAM, FeFET, STT-MRAM, RRAM, and FLASH. His research & development interests are primarily focused on the device physics, material development and integration of embedded memory solutions, with a special interest lying in the exploration of emerging ferroelectric and ferromagnetic device concepts.
Yuan-Jen Lee is a Technical Manager of MRAM Program in Embedded Technology Division at TSMC. He has 16 years of professional experiences in the research and development MRAM. Prior to joining TSMC, he was a Senior Manager in the STT-MRAM team at TDK-Headway Technologies. He received Ph.D. degree in Physics from National Taiwan University in 2003. He has published 30+ MRAM relative papers and holds 20+ issued U.S. patents.
Jeong-Heon Park is a Principal Engineer at Samsung Electronics and currently works on Research and Development of STT-MRAM and emerging memories. He is responsible for developing MTJ stack and module process for Samsung’s next generation MRAM and emerging devices with higher speed and higher density. He started his career at Samsung in 1999 where he had developed integration processes for DRAM and Flash memories. He received a Ph. D in Materials Science and Engineering at Carnegie Mellon University in 2010 where he had studied perpendicular magnetoresistive devices for STT-MRAM and Spin Torque Oscillator. He has authored or co-authored more than 50 research papers and holds more than 30 U.S. and international patents.
Sahil Patel is a process technologist with a background in film deposition and etching for spintronic devices. Prior to joining Applied Materials where he works in the Advanced Product and Technology Development Group, he worked on PVD and etch for STT-MRAM devices at TDK-Headway technologies. Sahil is interested in linking process conditions to final device performance in order to design new processes and tools that can enable the next generation of semiconductor devices.
Tiffany Santos is a Senior Manager at Western Digital in San Jose, California, working in the Research division on materials for non-volatile memory technology. She first joined the company in 2011, when it was previously known as Hitachi Global Storage Technologies, to work on research of media for heat-assisted magnetic recording. She received her SB and PhD in Materials Science and Engineering from the Massachusetts Institute of Technology, where she did her thesis research on magnetic tunnel junctions and thin film magnetism. After receiving a PhD, she became a Distinguished Postdoctoral Fellow, and later an Assistant Scientist, in the Center for Nanoscale Materials at Argonne National Laboratory. In 2009, she was awarded a L’Oreal USA Fellowship for Women in Science.
Dr. Daniel Worledge received a BA with a double major in Physics and Applied Mathematics from UC Berkeley in 1995. He then received a PhD in Applied Physics from Stanford University in 2000, with a thesis on spin-polarized tunneling in oxide ferromagnets. After joining the Physical Sciences Department at the IBM T. J. Watson Research Center, he invented and developed Current-in-Plane Tunneling (CIPT), enabling fast measurements of magnetic tunnel junctions. In 2003, Dr. Worledge became the manager of the MRAM Materials and Devices group, and in 2013 he became Senior Manager of MRAM. He discovered perpendicular magnetic anisotropy in CoFeB/MgO and led the team to demonstrate the first practical perpendicular magnetic tunnel junctions for Spin Torque MRAM.